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Je souhaite recevoir la dernière alerte Emploi pour les postes de ce type : algorithm engineer (paris, a8)

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Digital IC/ASIC Design Engineer

Prophesee -
Paris (75)

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Détails de l'emploi

Qualifications

Fabrication
Niveau Doctorat
VHDL
Git
Anglais
Verilog
C++
C
Perl
Scripting
Linux
Autodesk Inventor
SystemVerilog
SystemC
Détecteur
Python
Debugging

Description complète du poste

About PROPHESEE

Prophesee is the inventor of the world’s most advanced neuromorphic vision systems. The company developed a breakthrough event-based vision approach to machine vision that enables dramatic reductions in power consumption, latency, and data processing requirements. By mimicking how the human eye and brain work, Prophesee’s patented Metavision sensors and algorithms reveal information that is invisible to traditional frame-based sensors.

Prophesee’s technology is transforming applications across industrial automation, aerospace and defense, autonomous systems, IoT, AR/VR, and mobile.

Headquartered in Paris, Prophesee has offices in Grenoble and Shanghai.

Job background

This position is based in Paris

We are looking for a passionate individual who demonstrates initiative, takes ownership, respects commitments, and exhibits a high level of autonomy and spirit of innovation. The ideal candidate would be a multitasking and creative digital IC/ASIC designer. You will be responsible for designing digital circuits (IPs - Intellectual Properties) to be integrated in the digital part of the neuromorphic vision sensor to improve its capabilities. To Do that you will be involved in debug phase to ensure functionality, PPA, and quality of the delivered IP before Tape-Out. Finally, you will be involved in real chip evaluation in Laboratory (Bring-Up phase) when it will be back from the foundry.

This is a great opportunity to join a state-of-the-art neuromorphic sensor company to lead a paradigm shift in computer vision across many industries. The day-to-day working environment is a small but impacting Digital Front End IC team (~7-10 people). You will be in contact with plenty of other engineering fields (Analog IC team, Systems Team, Software Algorithm team, etc..) and will also participate in silicon bring-up in laboratory when back from foundry.

Job details

Primary:

Prepare detailed written specifications, and help defining test protocols and test reports.

Evaluate development time to match milestones

Work in close collaboration with modelling, and R&D teams to meet functional requirements and performance goals.

Create the micro-architecture specifications of image signal processing blocks.

Design and debug RTL logic with particular attention to area and power efficiency.

Work in close collaboration with the verification engineer to define verification metrics and scenarios. (Extreme programming method)

Ensure design quality, PPA, and functionality.

Ensure support during: Chip Bring-Up, chip characterization, chip validation, test development phases, post-sales technical issues.

Work innovatively and creatively within the group with a particular focus on protecting innovation and IP through the patent process.

Participate in developing methodologies and flow efficiencies.

Keep up to date with new standards and general market information in the industry.

Secondary:

Follow up backend implementation, write SDC, UPF constraints file, debug and fix timing problems.

Support Analog/Pixel team in setting up mixed-mode simulations.

Participate in Technology / Supplier / Tool Selection.

Travel requirements

up to 10% of the working time

Required qualifications, experience, and skills

Education

MSc or PhD in Electrical Engineering, Computer Engineering, Physics, or similar

Experience

8+ years of hands-on experience in Digital IC design.

Required qualifications

Strong experience using VHDL or Verilog description languages.

Strong experience in creating ASIC IP (microarchitecture definition, implementation, verification, evaluation)

Strong experience in digital IC design from system study to tape-out.

Experience in STA/LINT/SVA-PSL, Python, Linux environment with knowledge in scripting, debugging and programming (Shell, TCL, Perl).

Experience in Git tool versioning usage

Preferred skills

C/C++, System C, System Verilog (understanding at least)

EDA tools and flows such as IES/Questasim.

Knowledge in image sensor processing, USB, I3C, I2C, SPI, DCMI, LVDS, MIPI protocols is interesting.

Knowledge of ASIC/CMOS fabrication technology and design aspects of ASIC/CMOS digital design.

Knowledge in physical design

Knowledge in FPGA flow and design.

Knowledge in High Level Synthesis (Stratus, Catapult, etc…)

Language skills

fluent oral and written communication in English is mandatory

Personal skills: Strong problem-solving skills, strong analytical skills. Flexible to dynamic environments and fast changing technologies. Passionate about technology. This person must work well with other engineers in a team environment. Good sense of autonomy. Must be pragmatic and self-motivated to complete a task even if it is outside of just the “well known” realm. “Can Do Attitude” is preferred.

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