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Co-design engineer for future computing architectures in HPC - M/F

CEA -
Saclay (91)

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Détails de l'emploi

Qualifications

Français
Niveau Doctorat
Git
Anglais
Java
Master
Bash
Verilog
C++
SoC
Docker
SVN
Scala
Scripting
Linux
SystemVerilog
SystemC
Python
Shell scripting

Description complète du poste

Description du poste

Domaine

Composants et équipements électroniques

Contrat

CDD

Intitulé de l'offre

Co-design engineer for future computing architectures in HPC - M/F

Statut du poste

Cadre

Durée du contrat (en mois)

Description de l'offre

We are looking for a co-design engineer for future computing architectures in HPC. This position, in a fixed-term contract, is based at the Nano-Innov site of Paris-Saclay, Essonne (91).

As part of a multidisciplinary team specializing in hardware IP design and EDA tools, you will develop innovative methodologies and tools for HW/SW co-design of electronic architectures, focusing on high-performance computing (HPC) and AI systems.

You will leverage VPSim (virtual prototyping) and A-DECA (architecture exploration)—tools that enable HW modeling, binary SW execution, functional validation, and performance analysis in a fully virtualized environment. These tools integrate QEMU-based emulation, external models, and a Python API for performance data extraction during application execution. A-DECA further supports efficient design space exploration via optimization strategies.

This role is part of EU-funded research projects on next-gen HPC networks and open-source EDA tools, with a focus on optical/photonic interconnects to address latency, bandwidth, and scalability challenges in large-scale computing.

In the course of your mission, you will be required to :

Understand the technical specifications of the computing system integrating an optical link and develop appropriate model in VPSim plateform
Develop a high-level virtual prototype based on CEA VPSIM simulation tool to provide first estimations of KPIs and to allow system-of-chiplets architecture exploration;
Determine best architectural parameters in terms of power, performance, area as well as sustainability using A-DECA tool ;
Collaborate/communicate with other research partners involved to expand CEA VPSIM tool to model optical-switch based architectures ;
Ability to assess, prepare, and contribute software components to open-source ecosystems ;
Participate in the scientific dissemination of the team's research results (contributions to publications in national and international conferences), design of videos, demonstrations and tutorials as well as in the valorization of our innovations.

#CEA-List ; #researcher ; #Nanotechnology ; #Simulation Model

Profil du candidat

You have an engineering/master's degree or a PhD in the field of computer science, electronics or embedded systems.

Required skills/knowledge:

HW description languages: SystemC, VHDL, Verilog, SystemVerilog, CHISEL
Knowledge of digital electronic architecture (processors, Caches, NoC, ...) ;
High level programming language: C++/Java/Scala ...
Scripting languages : Bash/Python ...
Development tools : IDE, make/cmake, svn/git, continuous integration, docker ...
Git environement

Desired experience and/or skills:

Experience in simulation/emulation, especially with QEMU
Knowledge in Linux kernel development;
Experience in other scripting languages (bash, tcl) would be a plus.
Knowledge in the field of operational research and/or machine learning algorithms would be a plus.

In accordance with the commitments made by the CEA to promote the integration of disabled people, this job is open to all. The CEA proposes arrangements and/or organizational possibilities for the inclusion of disabled workers.

Localisation du poste

Site

Saclay

Localisation du poste

France, Ile-de-France, Essonne (91)

Ville

Saclay

Critères candidat

Langues

Anglais (Courant)
Français (Courant)

Demandeur

Disponibilité du poste

08/06/2026

Informations générales

Entité de rattachement

Le CEA est un acteur majeur de la recherche, au service des citoyens, de l'économie et de l'Etat.

Il apporte des solutions concrètes à leurs besoins dans quatre domaines principaux : transition énergétique, transition numérique, technologies pour la médecine du futur, défense et sécurité sur un socle de recherche fondamentale. Le CEA s'engage depuis plus de 75 ans au service de la souveraineté scientifique, technologique et industrielle de la France et de l'Europe pour un présent et un avenir mieux maîtrisés et plus sûrs.

Implanté au cœur des territoires équipés de très grandes infrastructures de recherche, le CEA dispose d'un large éventail de partenaires académiques et industriels en France, en Europe et à l'international.

Les 20 000 collaboratrices et collaborateurs du CEA partagent trois valeurs fondamentales :

La conscience des responsabilités
La coopération
La curiosité

Référence

2026-39914

Description de la Direction

CEA's technology research division (DRT) has a portfolio of technologies in the fields of information and communication, energy and health. As an interface between research and industry, our mission is to develop and transfer technologies, from theoretical proof of concept to industrial demonstrators, effectively bridging the gap between research and industry.
CEA List, a research institute specialized in intelligent digital systems, is located in the heart of the Paris-Saclay science and technology cluster.

Description de l'unité

Within the CEA List, the Electronics Design Automation and Architectures Laboratory (LECA) has the mission to design innovative and flexible system-on-chip architectures that meet the challenges of performance, cost, energy consumption, safety and security, targeting critical embedded systems and HW accelerators for embedded AI. To reduce the development time and improve the quality of these architectures, the team of experts develop innovative design tools and methods.

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engineer (model based engineer) emplois - paris, a8

Co-design engineer for future computing architectures in HPC - M/F

[Permanent position] Senior IP subsystem SoC architect

[PhD] Reliability and Short-Circuit Robustness of GaN Power HEMTs F/H

Ingénieur.e expert.e développement électronique numérique F-H

Electronic System Engineer - Senior

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