As an AMS Verification Technical Leader, you will be responsible for defining, implementing, and leading verification activities for complex Analog Mixed-Signal (AMS) ASIC products.
Your main responsibilities will include:
AMS Verification Technical Leadership
Define and drive the overall verification strategy at IP and top level
Lead verification activities for DC/DC converter IPs and their system integration
Ensure functional coverage, verification completeness, and high-quality deliverables
System-Level AMS Verification
Develop and validate AMS Top Cell verification environments
Ensure consistency between behavioral models and transistor-level implementations
Validate analog/digital interactions at system level
Modeling and Abstraction
Develop and maintain AMS models using wreal (Real Number Modeling)
Create models in Verilog-AMS and SystemVerilog RNM
Structure models based on physical quantities (voltage, current, impedance)
Digital Verification Integration
Build and maintain verification environments using SystemVerilog / UVM
Integrate AMS models into advanced digital verification testbenches
Protocols and Interfaces
Contribute to the modeling and verification of specific interfaces, including PSI5 (Peripheral Sensor Interface)
Team Leadership
Provide technical leadership to a team of ~5 verification engineers
Mentor team members and support their technical growth
Conduct design and verification reviews
Act as the main technical interface with design, architecture, and validation teams
L'agence de rattachement de cette offre se situe à Toulouse. Profil Recherché
Education
Master’s degree or PhD in Electronics, Microelectronics, or Embedded Systems
Experience
Minimum 5 years of experience in AMS verification within ASIC development
Proven experience in a technical leadership or senior expert role
Experience leading or coordinating a small team (around 5 engineers)
Required Technical Skills
Strong experience in AMS verification (including DC/DC converters)
Expertise in AMS Top Cell verification environments
Solid knowledge of Real Number Modeling (wreal)
Hands-on experience with Verilog-AMS and SystemVerilog RNM
Good understanding of physical modeling (voltage, current, impedance)
Strong background in SystemVerilog / UVM
Familiarity with PSI5 protocol
Soft Skills
Strong analytical and problem-solving skills
Technical leadership and team mentoring abilities
Excellent communication and cross-functional collaboration skills
Autonomous, detail-oriented, and quality-driven
Nice to Have
Experience in automotive applications or functional safety (ISO 26262)
Familiarity with AMS simulation tools (Cadence, Synopsys, etc.)
Avantages Salariaux
10 jours de RTT par an
Allocation repas ou Titre restaurant presque intégralement pris en charge
Mutuelle Santé Famille
Compte Epargne Temps
Participation et Intéressement
Prime de cooptation de 1000 ou 1500 €
Prime de vacances
Prime Transport de 200 € net par an et 50 € brut mensuel. Qui sommes-nous
ELSYS Design est une société d’ingénierie spécialisée dans la conception de systèmes électroniques embarqués.
Nous accompagnons nos clients issus de secteurs variés (énergie, semiconducteur, défense, spatial, transport, etc.) dans 4 domaines principaux : la microélectronique ( FPGA , ASIC , SoC ), la carte , le logiciel embarqué et l’ ingénierie système .
Chez ELSYS Design, nous sommes tous ingénieurs , votre manager sera donc lui aussi issu de la technique. Il veillera à vous proposer des projets pertinents qui vous permettront de vous constituer une expérience riche, bâtie sur un socle de compétences recherchées .
Vous aimez relever des défis techniques ? Vous avez envie d’évoluer dans une ambiance humaine, bienveillante et responsabilisante ? D’intégrer une structure familiale, présentant les avantages d’un grand groupe ?
Alors, n’hésitez plus : postulez et rencontrons-nous !
