NXP CAEN is seeking a Senior DfT Engineer to contribute to the design and implementation of Design-for-Test (DFT) solutions for complex System-on-Chip (SoC) products for Automotive Market, ensuring high test coverage and efficient manufacturing test flows.
Your Responsibilities:
- Develop and implement DFT architectures and methodologies for digital and mixed-signal IPs and SoCs, including scan, JTAG, memory BIST, and logic BIST.
- Perform DFT insertion and verification using industry-standard EDA tools.
- Generate test patterns (e.g., ATPG, BIST patterns) and ensure their effectiveness in achieving target fault coverage.
- Analyze test coverage reports and work with design teams to identify and resolve DFT-related design issues.
- Collaborate with verification and test engineering teams to define and validate manufacturing test plans.
- Debug silicon test failures and provide support for production ramp-up.
- Contribute to the continuous improvement of DFT methodologies and flows.
- Document DFT specifications, implementation details, and test plans.
Your Profile:
- Master's degree in Electrical Engineering,
