The position is funded by a large project, CAMELIA, involving several academic partners from France. The CAMELIA (Hardware and Software Components for Advanced AI Accelerators) program focuses on developing scalable, modular AI acceleration components and their associated software environment. It aims to create specialized accelerators based on chiplets and 2.5D/3D integration that target key functions for executing AI models, using a joint hardware/software/application co-design approach. Anticipating breakthroughs in both hardware and software, the program aims to achieve significant performance gains—particularly in energy efficiency—compared to current industry solutions based on GPUs or NPUs.
More specifically, it targets the design of chiplets dedicated to accelerating key functions (tensor computation, sparse computation, dynamic low-precision management), their integration into modular systems-on-chip, and the optimization of the associated software stack for compilation, orchestration, and application development. As the project matures, it will also incorporate constraints related to cost, safety, security, and environmental responsibility.
Inside CAMELIA, the position is focused on the design and verification (RTL, Physical) of the AI accelerator, similar in spirit to Google's TPU, but with specific features proposed by some of the academic partners.
The position is for a one-year term, but it may be extended for up to 6 years, which is the duration of the CAMELIA project.
